For testing integrated semiconductor circuits, testers or automatic test equipment are used in which the semiconductor circuits are contacted on a test socket by so-called probe cards via a load board. In conventional tests, every terminal contact of the semiconductor circuit to be tested is contacted by a test contact of the probe card and connected to a separate tester channel. The test equipment for such a tester is expensive and relatively significant because, for each signal terminal of the integrated circuit to be tested, one test contact and one tester channel must be provided. This relatively expensive equipment and valuable contacting expenditure also makes an “at speed test” more difficult in which it is required to apply and evaluate the test signals at the speed needed by the integrated circuit to be tested in each case. In addition, only little compatibility of the tester equipment is given with such complete contacting of all signal terminals especially since different probe cards, different programs, and allocations of the tester channels of the tester must be provided for different types of circuits to be tested.
It is conceivable to replace this complete test principle described by a test in which only a number of the signal terminals on the circuit to be tested are contacted since certain areas of the circuit are combined. This would make it possible to achieve a considerable acceleration of the test and distinct cost reduction. However, it is associated with a reduction in the quality of checking.
Until this time, especially for testing DC parameters, it has been mandatory to provide external contact arrangements, e.g., passive circuits on the test socket, or a contact arrangement with a test system for all signal terminals of the circuit to be tested.